In recent years, non-volatile memories which are semiconductor memory devices which can retain data even when the power supply is turned off have come into wide use. In flash memory, a popular type of non-volatile memory, a transistor which constitutes a memory cell has a so-called charge storage layer of either a floating gate or an insulating film. The charge storage layer accumulates electrical charges, thereby storing data. As a flash memory provided with an insulating film as a charge storage layer, a flash memory in a silicon-oxide-nitride-oxide-silicon (SONOS) structure accumulates electrical charges in a charge storage layer of an oxide-nitride-oxide (ONO) film.
FIG. 1A is a top view of a conventional flash memory device, and FIG. 1B is a cross-sectional view of the flash memory device shown in FIG. 1A taken along the line A-A. In FIG. 1A shows semiconductor substrate 10, a bit line 12, a word line 22 and a contact plug 28 as viewed through an interlayer insulating film 24, a protection film 44. With reference to FIGS. 1A and 1B, the bit line 12 is provided so as to extend into the semiconductor substrate 10. On the semiconductor substrate 10, is provided an ONO film 20 composed of a tunnel insulating film 14, a charge storage layer 16, and a top insulating film 18. On the ONO film 20, a word line 22 is provided to extend across the bit line 12. So as to cover the word line 22, the interlayer insulating film 24 is provided. On the bit line 12, a contact hole 26 penetrating through the interlayer insulating film 24 is provided and, so as to be embedded in the contact hole 26, a contact plug 28 coupled with the bit line 12 is provided. On the interlayer insulating film 24, a wiring layer 42 and the protection film 44 are provided.
In the flash memory device, the bit line 12 is formed by diffusion region, and thus possesses a high resistance. Therefore, in order to electrically couple the bit line 12 with the wiring layer 42, the contact plug 28 is provided on the bit line 12 for every plurality of word lines 22. Japanese Patent Application Publication No. JP-A-2003-297957 discloses a technology to ensure the connection between the contact plug 28 and the bit line 12.